Dynamic core swapping

Electrical computers and digital processing systems: support – Computer power control

Reexamination Certificate

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Details

C713S320000, C713S323000

Reexamination Certificate

active

07461275

ABSTRACT:
An embodiment of the present invention is a technique to dynamically swap processor cores. A first core has a first instruction set. The first core executes a program at a first performance level. The first core stops executing the program when a triggering event occurs. A second core has a second instruction set compatible with the first instruction set and has a second performance level different than the first performance level. The second core is in a power down state when the first core is executing the program. A circuit powers up the second core after the first core stops executing the program such that the second core continues executing the program at the second performance level.

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