Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1998-09-25
2000-06-27
Auve, Glenn A.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
716 18, 716 5, G06F 1300
Patent
active
060818646
ABSTRACT:
A system and method for dynamic verification of functionality of an HDL (Hardware Description Language) design of a computer system component is disclosed. A simulated model of the HDL design is created. A test configuration for the simulated model is selected through a configuration interpretation mechanism, based on a plurality of user-supplied parameters. The user-supplied parameters, for example, include the amount of the memory in the system, the number of memory banks, addresses of various PCI devices, the type of the CPU etc. The test configuration is then compiled. At run-time, the test configuration is simulated. The responses by the simulated model of the HDL design to various test stimuli from a stimulus file are then evaluated under the chosen test configuration. One or more different test configurations may be simulated at run-time, and the stimulated model's responses to a pre-determined set of test stimuli may be reevaluated for each such test configuration. Thus, the test configuration is effectively separated from the test stimulus generation mechanism. This allows permutations of a given test suite across many test configurations without creating extremely large number of tests.
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Askar Tahsin
Berndt Paul
Lowe Mike
Rendon Enrique
Advanced Micro Devices , Inc.
Auve Glenn A.
Chung-Trans X.
Kivlin B. Noel
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