Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1997-07-03
1999-11-09
Lam, Tuan T.
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 98, H03K 190948
Patent
active
059821973
ABSTRACT:
A dynamic circuit that prevents a malfunction, even when the operating temperature is high, including a pre-charging circuit connected between a power source node and a signal wiring, a plurality of discharging circuits being connected between a power source node and a signal wiring, a plurality f discharging circuit connected between the signal wiring and a ground potential respectively and for being selectively turn-ON/OFF controlled, a leakage current detecting circuit for detecting a current corresponding to a leakage current generated between the signal wiring and the ground potential in the turn-OFF state of each discharging circuit, and a leakage current correcting circuit connected between the power source node and the signal wiring and for continuously supplying to the signal wiring a leakage correction current equivalent to a leakage current of the signal wiring corresponding to a detected current of the leakage current detecting circuit during a leakage current correction period.
REFERENCES:
patent: 4563598 (1986-01-01), Oritani
patent: 4651029 (1987-03-01), Oritani
patent: 5291076 (1994-03-01), Bridges et al.
patent: 5432463 (1995-07-01), Wong et al.
Nonaka Satoshi
Ono Takeshi
Terashima Kaoru
Kabushiki Kaisha Toshiba
Lam Tuan T.
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