Dynamic bus repeater with improved noise tolerance

Details Dynamic bus repeater with improved noise tolerance Dynamic bus repeater with improved noise tolerance

2005-09-06

2005-09-06

Baumeister, B. William (Department: 2891)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C327S200000

Reexamination Certificate

active

06940313

ABSTRACT:
In an embodiment, a dynamic bus includes a dynamic bus repeater with a noise margin of about Vcc/2. The bus repeater splits the bus into front and rear segments. The front segment pre-charges while the rear segment evaluates, and vice versa. The dynamic bus repeater hides the pre-charge signal propagated from the front segment from the rear segment while the rear segment is evaluating.

REFERENCES:
patent: 6069513 (2000-05-01), Rossi et al.
patent: 6215159 (2001-04-01), Fujita et al.
patent: 6225846 (2001-05-01), Wada et al.
patent: 6510503 (2003-01-01), Gillingham et al.
patent: 406164327 (1994-06-01), None

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