Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
1999-08-30
2002-06-11
Gaffin, Jeffrey (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S034000, C710S033000, C710S052000, C710S060000, C710S260000, C710S266000
Reexamination Certificate
active
06405268
ABSTRACT:
COPYRIGHT NOTICE
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
BACKGROUND
1. Field of the Invention
This invention relates to host signal processing modems and to methods for information transfers between hardware and interrupt-driven software in computer systems that can miss servicing interrupts.
2. Description of Related Art
A conventional host signal processing (HSP) modem includes dedicated modem hardware that connects to telephone lines and software that the central processor of a host computer executes. The modem hardware receives an analog signal (Rx signal) in compliance with a modem protocol such as v.34 or v.90 from the telephone lines, converts the receive signal into a series of digital samples (Rx samples), and passes the Rx samples to the host computer for processing. The modem hardware also receives digital samples (Tx samples) from the host computer, coverts the Tx samples into an analog signal (Tx signal) in compliance with the protocol, and transmits the Tx signal on the telephone lines. The modem software receives and processes the Rx samples to demodulate the Rx signal and thereby extract received data. The modem software also receives and processes data to be transmitted and generates the Tx samples, which represent the Tx signal.
Recently proposed HSP modems or transceivers include software that the host computer executes to perform only part of the modulation or demodulation required for computation intensive communication standards such as HDSL. Dedicated hardware also performs part of the modulation or demodulation to reduce the loading of the host computer's central processor. Co-owned U.S. patent application Ser. No. 09/263160, entitled “Hybrid Software/Hardware Discrete Multi-Tone Transceiver” describes such systems and is hereby incorporated by reference in its entirety. These HSP or hybrid communication systems instead of transferring samples between software and hardware, transfers information such as Fourier transform coefficients.
Both the conventional HSP modems and the hybrid transceivers require a mechanism for transferring information between hardware and software. One modem software architecture uses interrupt-driven routines. For example, a host signal processing modem
100
shown in
FIG. 1
includes modem software
122
that a central processor
112
of a host computer
110
executes. Modem software
122
runs under an operating system
120
with applications and other software
124
. Modem hardware
130
connects to a system bus
116
of host computer
110
and periodically generates an interrupt signal. Host computer
110
executes an interrupt routine of modem software
122
to service an interrupt from modem hardware
130
. The interrupt routine reads a block of Rx samples, processes the Rx samples to extract data, and passes the data to appropriate client. The interrupt routine also checks for data to be transmitted, generates a block of Tx samples representing a portion of the Tx signal, and outputs the Tx samples. Typically, the transfers of Tx and Rx samples are between a buffer in main memory
114
of host computer
110
and a buffer in modem hardware
130
. Such transfers can be via DMA transfers or by modem software
122
directly reading from or writing to modem hardware
130
via bus
116
. During each period between consecutive interrupts, modem hardware
130
generates the Tx signal based on the block of Tx samples from modem software
122
and accumulates another block of Rx samples from the Rx signal.
A problem can arise when applications or other software
124
stop host computer
110
from servicing of an interrupt from HSP modem hardware
130
. When host computer
110
fails to service one or more interrupts, HSP modem hardware
130
can run out of Tx samples to convert. As a result, HSP modem hardware
130
may fail to maintain a Tx signal adequate for the connection on telephone lines
140
. Accordingly, a remote device may disconnect. U.S. Pat. No. 5,721,830 and U.S. patent application Ser. No. 09/010,813 describe methods for using circular buffers in modem hardware
130
or main memory
114
to maintain the Tx signal and are hereby incorporated by reference herein in their entirety. The size of the circular buffers can be selected to maintain continuity of the Tx signal from modem hardware
130
so that the remote device does not disconnect. However, during the missed interrupt, modem software
122
does not process the Rx samples, and received data can be lost as samples are overwritten. When host computer
110
resumes servicing the interrupts for the HSP modem, modem software
122
typically must request a re-transmission of the lost data and often must handle a retrain operation. This reduces the data throughput of the HSP modem. Accordingly, an HSP modem architecture is desired that avoids a disconnect or retraining and maintains data throughput even when a host computer fails to service one or more interrupts.
SUMMARY
In accordance with an aspect of the invention, a DMA engine continuously transfers data/information between a host computer's main memory and dedicated modem hardware. The DMA transfers continue even during missed interrupt service. To take advantage of this feature of the DMA engine, modem software fills a large buffer with a reserve of previously generated information representing the transmit signal. Thus, when the host computer skips interrupt service, the DMA engine transfers information from the reserve in the buffer, and modem hardware continues to maintain the transmit signal. The buffer also contains space for received data that the DMA transfers may store in the buffer during missed interrupts. To maintain the buffer in condition to handle future missed interrupts, the modem software, during each serviced interrupt, dynamically determines the amount of data from the buffer to process and the amount of new data to generate.
In an exemplary embodiment of the invention, the HSP modem sets up a transmit buffer in the host computer's main memory, for DMA transfers from the main memory to modem hardware. The transmit buffer contains N blocks, where one block is the amount of memory required to hold the information representing the transmit signal during one interrupt period. A DMA transfer pointer points to a block in the transmit buffer that contains the information, for example, Tx samples, for the transmit signal during the current interrupt period. A write pointer indicates a second block where the modem software next writes information, and the modem software attempts to maintain about one block of separation is between the DMA transfer pointer and the write pointer. The remaining N−2 blocks in the buffer contain additional information that the DMA engine transfers to the modem hardware during the next N−2 interrupt periods. With the additional data in the transmit buffer, the HSP modem can handle up to N−2 missed interrupts without affecting the transmit signal.
Similarly, a receive buffer in the main memory is dedicated for DMA transfers from the modem hardware to the main memory. The receive buffer contains N blocks, where each block is the amount of memory required to hold the information, for example, Rx samples, received during one interrupt period. Of the N blocks, one block is for the Rx samples to be received during the current interrupt period, and one block contains the data that the modem software should process during the current interrupt period. During normal operations, the remaining N−2 blocks are available for additional received information, and the HSP modem can handle up to N−2 missed interrupts without overwriting or losing received information.
When executed, the modem software determines the number
Paul Thomas K.
Wang Long
Zhou Di
Gaffin Jeffrey
PC-Tel, Inc.
Perveen Rehana
Skjerven Morrill LLP
Woo Philip W.
LandOfFree
Dynamic block processing in a host signal processing modem does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic block processing in a host signal processing modem, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic block processing in a host signal processing modem will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2912307