DVI link with circuit and method for test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S703000, C714S738000

Reexamination Certificate

active

07836363

ABSTRACT:
A method of transmitting data through a link comprises encoding digital data into encoded digital data in a transition minimized differential signaling encoder, serializing the encoded digital data into encoded and serial digital data in a serializer, generating test data in a pseudo-random binary sequence generator circuit, transmitting the encoded and serial digital data through a multiplexer to a transmission medium in a normal mode of operation, and transmitting the test data through the multiplexer to the transmission medium in a test mode of operation. The encoder, the serializer, the sequence generator circuit, and the multiplexer are fabricated in a single integrated chip. The test data includes data to generate colors in a visual image, and the encoded and serial digital data is received, deserialized, decoded, and displayed in a display unit.

REFERENCES:
patent: 3956601 (1976-05-01), Harris et al.
patent: 4625290 (1986-11-01), White
patent: 4701916 (1987-10-01), Naven et al.
patent: 5274445 (1993-12-01), Overton et al.
patent: 5408055 (1995-04-01), Harris et al.
patent: 5457700 (1995-10-01), Merchant
patent: 5553059 (1996-09-01), Emerson et al.
patent: 5715073 (1998-02-01), Miller
patent: 5761216 (1998-06-01), Sotome et al.
patent: 6069876 (2000-05-01), Lander et al.
patent: 6108801 (2000-08-01), Malhotra et al.
patent: 6144244 (2000-11-01), Gilbert
patent: 6408412 (2002-06-01), Rajsuman
patent: 6950974 (2005-09-01), Wohl et al.
patent: 7024601 (2006-04-01), Quinlan et al.
patent: 7024607 (2006-04-01), Warner et al.
patent: 7441172 (2008-10-01), Warner et al.
patent: 2003/0070126 (2003-04-01), Werner et al.
patent: 2006/0156161 (2006-07-01), Warner et al.
patent: 2006/0161829 (2006-07-01), Kobayashi
patent: 2009/0043834 (2009-02-01), Warner et al.
patent: 0196152 (1986-10-01), None
patent: WO01/73465 (2001-10-01), None
“Digital Visual Interface, Revision 1.0”,Digital Display Working Group, (1999),pp. 1-76.
“DVI Test and Measurement Guide, Revision 1.0”,DDWG Electrical Test Working Group, (2001),pp. 1-26.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

DVI link with circuit and method for test does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with DVI link with circuit and method for test, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DVI link with circuit and method for test will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4250142

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.