Duty cycle correction circuit of delay locked loop and delay...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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Details

C327S172000

Reexamination Certificate

active

07119594

ABSTRACT:
A duty cycle correction circuit and a delay locked loop (DLL) including the duty cycle correction circuit, are capable of controlling their operation in order to correctly analyze the cause of generation of a duty cycle error when the duty cycle error is generated in the DLL. The duty cycle correction circuit selectively outputs to a DLL core duty cycle offset information for controlling a duty cycle of an internal clock signal synchronized to an external clock signal under the control of a switching control signal. The DLL corrects the duty cycle of a reference clock signal according to the duty cycle offset information, thereby outputting a reference clock signal having a 50% duty cycle.

REFERENCES:
patent: 5945862 (1999-08-01), Donnelly et al.
patent: 6181178 (2001-01-01), Choi
patent: 6342801 (2002-01-01), Shin
patent: 6643790 (2003-11-01), Yu et al.
patent: 6735669 (2004-05-01), Shin
patent: 6853225 (2005-02-01), Lee

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