Duty cycle adaptive data output buffer

Details Duty cycle adaptive data output buffer Duty cycle adaptive data output buffer

1998-04-29

2000-10-03

Kim, Jung Ho

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327376, 327382, 326 27, 326 87, H03K 300

Patent

active

061278610

ABSTRACT:
The present invention relates to a duty cycle adaptive data output buffer of a semiconductor device in which the current driving power of the output buffer is adaptively varied with a duty cycle, to effectively improve noise margin at slow duty cycle. The duty cycle adaptive data output buffer disclosed includes first and second pull-up transistors connected between a power supply voltage and an output terminal; first and second pull-down transistors connected to the output terminal and a ground; duty cycle detector for receiving a duty clock signal, to generate a first control signal at faster duty cycle, and to generate a second control signal at slower duty cycle; a first output driver for driving the first pull-up and pull-down transistors using first and second data signals in response to the first control signal; and a second output driver for driving the second pull-up and pull-down transistors using the first and second data signals in response to the second control signal.

REFERENCES:
patent: 5153450 (1992-10-01), Ruetz
patent: 5489859 (1996-02-01), Kawaguchi et al.
patent: 5528166 (1996-06-01), Iikbahar

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