Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
1998-02-20
2001-01-16
Cabeca, John W. (Department: 2752)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S158000
Reexamination Certificate
active
06175903
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a duplexing system, and more particularly, to a duplexing system and method for writing a reserve list thereof, by which a reserve list is conveniently set up during a processor error, and priority procedure order is forced to occur during a critical process.
2. Description of the Prior Art
Typically, in a system comprising a processor which can operate plural independent jobs, if that duplexing function is automatically performed by an auxiliary processor, owing to a single auxiliary or when error is generated in plural processors simultaneously, each reserve list is stored in memory in order of the error generation in a time sequence. That is, regardless which processor is important, the reserve list is written by the method in which error data of processor is sequentially registered in a reserve list in the error generation time order.
In the conventional writing method of a reserve list by which the reserve list is written in an error generation time order, if a processor item occupied at a middle portion of the list has to be deleted for an error restored processor to be eliminated from a list, the following order corresponding to the item is shifted ahead in one step as shown in
FIG. 12A
, whereas if processor item has to be inserted in a middle portion of the list, the following item relative to the inserted item is shifted back in one step as shown in FIG.
12
B. That causes a problem that the procedure is very complicated and a larger data storage memory is required.
Further, since error data is absolutely registered in a reserve list corresponding to an error generation time during error of critical processor, and not following the priority order, it causes another problem of a malfunction of the duplexing procedure.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a duplexing system and method for writing a reserve list thereof for solving the problems.
It is another object of the present invention to provide a duplexing system and method for writing a reserve list thereof by which a reserve list can be conveniently changeable while generating an error in a processor.
It is another object of the present invention to provide a duplexing system and method for writing a reserve list thereof by which a priority order is accessed to a critical processor in a forced manner.
In order to achieve the above objects of the present invention, memory space to store a reserve order list is allotted to two bytes per one processor. A number of leading order processor is stored in a first byte, whereas a number of the following order processor is stored in the second byte. Further, the top priority bit or the last bit of each byte of memory space in which the processor to be backed-up is allotted is set, and thus the existence of a registration is displayed.
Further, if an error occurs at plural processors, a non channel card generates a reserve list according to a time sequence of error generation. If an error occurs at a processor of another top priority order while operating a back-up of a channel card, the processor is registered at the leading order list. If processor in a back-up procedure is restored at the present channel card, the channel card is maintained in a waiting status, and the top priority order processor is detected from a back-up list memory and is reserve. If any one processor among the processor registered in the present reserve list memory is restored, a corresponding item is deleted from a reserve list memory. The leading item is connected to the following item, and thus an order retrieval of a reserve list is conveniently performed.
REFERENCES:
patent: 4625308 (1986-11-01), Kim et al.
patent: 5051887 (1991-09-01), Berger et al.
patent: 5422837 (1995-06-01), Boothroyd et al.
patent: 5426765 (1995-06-01), Stevens et al.
patent: 5809543 (1998-09-01), Byers et al.
patent: 5864657 (1999-01-01), Stiffler
patent: 5864677 (1999-01-01), Loo
patent: 5870537 (1999-02-01), Kern et al.
patent: 5966730 (1999-10-01), Zulch
Anderson Matthew D.
Cabeca John W.
Hyundai Electronics Ind. Co. Ltd.
Reed Smith Shaw & McClay LLP
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