Dummy patterns and method of manufacture for mechanical...

Details Dummy patterns and method of manufacture for mechanical... Dummy patterns and method of manufacture for mechanical...

2006-12-15

2009-10-20

Dang, Trung (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257SE21579, C257SE23161, C438S687000

Reexamination Certificate

active

07605470

ABSTRACT:
A method for fabricating a semiconductor device. The method includes providing a semiconductor substrate including a surface region. The method forms a first interlayer dielectric overlying the surface region and forms an interconnect layer overlying the first interlayer dielectric layer. The method also forms a low K dielectric layer overlying the interconnect layer, which has a predetermined shape. The method forms a copper interconnect layer overlying the low K dielectric layer. In a preferred embodiment, the low K dielectric layer maintains the predetermined shape using a dummy pattern structure provided within a portion of the low K dielectric layer to mechanically support and maintain the predetermined shape of the low K dielectric layer between the interconnect layer and the copper interconnect layer.

REFERENCES:
patent: 2005/0035457 (2005-02-01), Tomita et al.
patent: 2005/0082577 (2005-04-01), Usui
patent: 2007/0281465 (2007-12-01), Otsuka

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