Dual row leadframe and fabrication method

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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C438S124000

Reexamination Certificate

active

07060536

ABSTRACT:
A semiconductor package is provided. A leadframe including a die attach paddle, a number of inner leads, and a number of outer leads, and a number of extended lead tips on the number of outer leads. The inner edges of the number of extended lead tips are in substantial alignment with the inner edges of the number of inner leads. A die is attached to the die attach paddle. A number of bonding wires is used to connect the die to the number of inner leads and the extended lead tips on the number of outer leads, and an encapsulant is formed over the leadframe and the die.

REFERENCES:
patent: 6455922 (2002-09-01), Arguelles et al.
patent: 6703692 (2004-03-01), Pruitt
patent: 2002/0041010 (2002-04-01), Shibata
patent: 2002/0140074 (2002-10-01), Wehrly, Jr.

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