Dual row leadframe and fabrication method

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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Reexamination Certificate

active

07339258

ABSTRACT:
A semiconductor package is provided. A leadframe including a die attach paddle, a number of inner leads, and a number of outer leads, and a number of extended lead tips on the number of outer leads. The inner edges of the number of extended lead tips are in substantial alignment with the inner edges of the number of inner leads. A die is attached to the die attach paddle. A number of bonding wires is used to connect the die to the number of inner leads and the extended lead tips on the number of outer leads, and an encapsulant is formed over the leadframe and the die.

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patent: 6703692 (2004-03-01), Pruitt
patent: 6710431 (2004-03-01), Shibata
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patent: 2002/0041011 (2002-04-01), Shibata
patent: 2004/0061204 (2004-04-01), Han et al.
patent: 2004/0070055 (2004-04-01), Punzalan et al.
patent: 2004/0070056 (2004-04-01), Matsuzawa et al.
patent: 2004/0159918 (2004-08-01), Lee
patent: 2004/0217450 (2004-11-01), Li et al.
patent: 2006/0151858 (2006-07-01), Ahn et al.

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