Static information storage and retrieval – Addressing – Multiple port access
Patent
1993-04-20
1996-03-26
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Multiple port access
36518904, 36523002, 36523003, 36518902, G11C 800
Patent
active
055026834
ABSTRACT:
In order to access several pieces of information concurrently, computers can make use of multi-port access memories. This invention introduces a circuit for a memory system that can be used in such applications. Dual-ported memory access is achieved without duplication of the memory arrays or of the word and bit lines used in the circuit. The circuit allows concurrent read and/or write operations by controlling access to independently controlled sections of the word lines in a memory array and is useful for dual ported data caches. In instruction cache memory applications, the circuitry can be used to allow concurrent access to a number of multiple words. The total number of words accessed concurrently is equal to the total cache width and is independent of the address of the lowest word being accessed.
REFERENCES:
patent: 4558433 (1985-12-01), Bernstein
patent: 4577292 (1986-03-01), Bernstein
patent: 4616347 (1986-10-01), Bernstein
patent: 4742487 (1988-05-01), Bernstein
patent: 4807195 (1989-02-01), Busch et al.
patent: 4811296 (1989-03-01), Garde
patent: 4819209 (1989-04-01), Takemae et al.
patent: 4888741 (1989-12-01), Malinowski
patent: 5007028 (1991-04-01), Ohshima et al.
patent: 5036491 (1991-07-01), Yamaguchi
patent: 5257237 (1993-10-01), Aranda et al.
Geiger, Allen & Strader, "VLSI Design Technology for Analog and Digital Circuits", pp. 822 & 823, McGraw Hill (1990).
Driscoll, Matick, Puzak and Shedletsky, "Split Cache with Variable Interleave Boundary" IBM TDB vol. 22 No. 11 Apr. 1980 pp. 5183-5186.
Bernstein, K., "Port-Multiplexed Register File" IBM TDB vol. 27 No. 11 Apr. 1985 pp. 6570-6573.
Wyland, David C., "Dual-Port Rams Simplify Communication In Computer Systems" pp. 1-10, Integrated Device Technology, Inc. Apr. 1986.
Johnson, M., "Superscalar Microprocessor Design", Chapter 3, pp. 44 & 45, Prentice-Hall 1991.
International Business Machines - Corporation
Nguyen Tan T.
Percello Louis J.
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