Static information storage and retrieval – Read/write circuit – For complementary information
Patent
1983-09-27
1986-03-25
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
For complementary information
365149, G11C 700
Patent
active
045787808
ABSTRACT:
A dual port type semiconductor memory using a dynamic type random access memory (RAM) includes; a plurality of word lines, a plurality of pairs of bit lines, and a dynamic type RAM connected at each intersection of the word lines and the bit lines. The semiconductor memory further includes a first column decoder connected to a writing-reading out bus through a pair of gates (G.sub.1) including two transistors directly connected to each of the bit lines, and a second column decoder connected to a reading out bus through a pair of gates (G.sub.2) including four transistors. Gates of two of the four transistors of the second pair of gates are connected to each bit line. The other two of the four transistors are connected to the reading out bus.
REFERENCES:
patent: 4045783 (1977-08-01), Harland
Fujitsu Limited
Popek Joseph A.
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