Dual port SRAM with dedicated read and write ports for high...

Details Dual port SRAM with dedicated read and write ports for high... Dual port SRAM with dedicated read and write ports for high...

2007-08-29

2010-10-12

Le, Vu A (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189150, C365S189140

Reexamination Certificate

active

07813161

ABSTRACT:
A dual port static random access memory (SRAM) having dedicated read and write ports provides high speed read operation with reduced leakages. The dual port SRAM includes at least one write word line, at least one read word line, at least one pair of write bit line and read bit line, a plurality of rows and columns. Each rows and column has at least one cell which includes at least one pair of memory elements cross-coupled to form a latch for storing data, a pair of write access semiconductors and a pair of read access semiconductors. The SRAM includes an inverter circuit and a pull down circuit which are operatively coupled to the at least one cell to increase read operation performance and eliminate leakage.

REFERENCES:
patent: 7701801 (2010-04-01), Joshi et al.
patent: 2006/0215465 (2006-09-01), Bhavnagarwala et al.
patent: 2006/0274569 (2006-12-01), Joshi et al.
patent: 2007/0242498 (2007-10-01), Chandrakasan et al.
patent: 2007/0279966 (2007-12-01), Houston

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