Dual port SRAM cell having pseudo ground line or pseudo power li

Details Dual port SRAM cell having pseudo ground line or pseudo power li Dual port SRAM cell having pseudo ground line or pseudo power li

1998-08-11

1999-10-26

Tran, Andrew Q.

Static information storage and retrieval

Addressing

Multiple port access

365156, 365154, 365226, 365222, G11C 800

Patent

active

059739851

ABSTRACT:
Disclosed is a multiport SRAM cell. The cell state may be switched by controlling the potential on a single bit line only. A true dual port SRAM cell (in which the two ports may be accessed nearly simultaneously without needing peripheral arbitration logic) employs two cross-coupled inverters, two bit lines, two word lines, and two access transistors. The SRAM cells employ internal "pseudo inverters" that can be independently powered on and off. By powering one of them off during the write operation, the internal conflict associated with changing the value of a stored bit is avoided. Each pseudo inverter may be powered on and off via a pseudo ground or a pseudo Vdd line which controls the potential to locations where ground or Vdd are normally supplied to CMOS inverters.

REFERENCES:
patent: 5260908 (1993-11-01), Ueno
patent: 5379260 (1995-01-01), McClure

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