Dual port semiconductor memory device

Details Dual port semiconductor memory device Dual port semiconductor memory device

1992-10-05

1994-06-28

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Bad bit

36523005, 36523006, G11C 800

Patent

active

053253329

ABSTRACT:
A dual-port RAM according to the present invention includes means responsive to a first control signal for determining at an input of a counter whether or not a redundancy substitution is required during a time period for which a serial read out is performed, outputting a result of the determination as a second control signal and holding the second control signal. Therefore, the determination of necessity of redundancy substitution can be performed at a timing prior to the conventional serial read by one serial read cycle. Further, since there are a plurality of read data buses provided, an interleave read out becomes possible. Therefore, a time from the determination of necessity of substitution to the redundancy circuit to an execution of substitution is also shortened by one serial read cycle, resulting in a speed up of the serial read.

REFERENCES:
patent: 4633441 (1986-12-01), Ishimoto
patent: 4870621 (1989-09-01), Nakada
patent: 4989181 (1991-01-01), Harada
patent: 5115413 (1992-05-01), Sato et al.

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