Static information storage and retrieval – Addressing – Multiple port access
Patent
1988-01-26
1990-01-09
Hecker, Stuart N.
Static information storage and retrieval
Addressing
Multiple port access
36518908, 36518906, 307471, 371 111, G11C 800, G11C 700, G06F 750, G06F 1100
Patent
active
048932809
ABSTRACT:
A dual port random access memory assembly having a custom tailored variable organization comprising a memory array or core (matrix) having, besides a pin for the supply voltage (VDD) connection and a pin for the ground voltage (GND) connection, a first and a second port, each port having two pins for supplying the control signals enabling the read and write operations, respectively; a set of pins for application of the address signals and a set of n data input/output (I/O) pins; wherein an organizer circuit is interposed between the n data input/output pins of the port which is to be organized or formatted and the memory array, which organizer circuit is driven by a number m of signals derived from a corresponding number m of data input/output pins of the output port and applied thereto through a corresponding number m of electronic switches and a corresponding number m of sharper circuits, so as to enable variable sets of bits to access to the memory through selective selts of input terminals and to convert up to a corresponding number m of data input/output pins of the port to be organized into a corresponding number m of additional address pins with respect to the latter port; the electronic switches being driven by a separate control signal.
REFERENCES:
patent: 4541076 (1985-09-01), Bowers et al.
patent: 4706216 (1987-10-01), Carter
Fiorentino Pasqualino
Gelsomini Tito
Hecker Stuart N.
Hiller William E.
Koval Melissa J.
Merrett N. Rhys
Sharp Melvin
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