Dual port PLD embedded memory block to support...

Details Dual port PLD embedded memory block to support... Dual port PLD embedded memory block to support...

2007-04-17

2007-04-17

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S189011

Reexamination Certificate

active

11076319

ABSTRACT:
A method for a read-before-write functionality for a memory within a programmable logic device (PLD) is provided. The method begins when a read operation and a write operation are initiated through two different ports of a memory simultaneously to access the same address in the memory. In order to prevent the write operation from proceeding prior to the read operation, a read-before-write control logic is provided to the control block of the port that supports the write operation. Thus, the write operation is paused until the control block of the port that supports the write operation receives a signal from a read sense amplifier indicating that the read operation is complete. The read sense amplifier is capable of detecting the completion of a read operation by monitoring the voltage difference of the read bitline. When this voltage difference reaches a threshold value, the read sense amplifier triggers a write wordline signal. The enabling of the write wordline signal causes, the data to be written to the memory.

REFERENCES:
patent: 6055606 (2000-04-01), Sharma
patent: 6480947 (2002-11-01), Hasegawa et al.

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