Dual port memory with synchronized read and write pointers

Details Dual port memory with synchronized read and write pointers Dual port memory with synchronized read and write pointers

1998-09-17

2000-12-26

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Simultaneous operations

395872, 710 52, 36523005, 365221, 36523008, G11C 700

Patent

active

061669636

ABSTRACT:
A FIFO stack is implemented using a DPRAM. One of the ports of the DPRAM is used to add elements to the FIFO stack, and the other port is used to remove elements from the FIFO stack. The ports operate in separate clock domains. A synchronization circuit coordinates the read and write operations across the clock domains.

REFERENCES:
patent: 4891788 (1990-01-01), Kreifels
patent: 5294983 (1994-03-01), Ersoz et al.
patent: 5426756 (1995-06-01), Shyi et al.
patent: 5544104 (1996-08-01), Chauvel
patent: 5555524 (1996-09-01), Castellano
patent: 5630096 (1997-05-01), Zuravleff et al.
patent: 5748551 (1998-05-01), Ryan et al.
patent: 5784582 (1998-07-01), Hughes
patent: 5787457 (1998-07-01), Miller et al.
patent: 5852608 (1998-12-01), Csoppenzky et al.
patent: 5884100 (1999-03-01), Normoyle et al.
patent: 5931926 (1999-08-01), Yeung et al.

Affiliated with

Also associated with

Rating

Dual port memory with synchronized read and write pointers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual port memory with synchronized read and write pointers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual port memory with synchronized read and write pointers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1002317