Dual port memory device with vertical shielding

Details Dual port memory device with vertical shielding Dual port memory device with vertical shielding

1999-01-06

2000-07-04

Nelms, David

Static information storage and retrieval

Addressing

Multiple port access

365 53, G11C 800

Patent

active

060848200

ABSTRACT:
A dual port memory device comprises a first group of bit lines corresponding to a first port of the device, a second group of bit lines corresponding to a second port of the device, and a vertical shielding layer disposed between the first group of bit lines and the second group of bit lines, for eliminating the capacitance coupling between the first group of bit lines and the second group of bit lines. The first group of bit lines are disposed in a first metal layer of the device, the vertical shielding is disposed in a second metal layer of the device, and the second group of bit lines are disposed in a third metal layer of the device. The present invention further comprises jumper lines for electrically connecting the bit lines in the metal layer above the vertical shielding layer to a diffusion well of a transistor. In addition, jumper windows are provided in the vertical shielding layer for allowing the jumper lines to pass through the vertical shielding layer.

REFERENCES:
patent: 5287322 (1994-02-01), Rastegar
patent: 5563820 (1996-10-01), Wada et al.
patent: 5808930 (1998-09-01), Wada et al.
patent: 5936875 (1999-08-01), Kim et al.

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