Dual port memory device with improved serial access scheme

Details Dual port memory device with improved serial access scheme Dual port memory device with improved serial access scheme

1987-11-27

1989-09-26

Popek, Joseph A.

Static information storage and retrieval

Addressing

Multiple port access

365219, 365220, 36523009, G11C 1300

Patent

active

048706213

ABSTRACT:
A dual port memory which enables consecutive access operations from an arbitrary column address and is fabricated on a reduced area of a semiconductor chip. The memory includes a memory array, a random access peripheral circuit for effecting random access to the array and having a column decoder, and a serial access peripheral circuit having a shift register for serially selecting the columns of the array and a control circuit for determining the state of the shift register in accordance with the output of the column register.

REFERENCES:
patent: 4633441 (1986-12-01), Ishimoto
patent: 4688197 (1987-08-01), Novak et al.
patent: 4723226 (1988-02-01), McDonough et al.

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