Dual port memory device

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S189040, C365S202000, C365S203000

Reexamination Certificate

active

07940599

ABSTRACT:
A multi-port memory device having a storage node, a precharge node, a first, second, third, and fourth transistor, and a control module. The first transistor includes a current electrode connected to the storage node, another current electrode connected to a first bit line, and a gate connected to a first wordline. The second transistor includes a current electrode connected to the storage node, another current electrode connected to a second bit line, and a gate connected to a second wordline. The third transistor includes a current electrode connected to the reference node, another current electrode connected to the first bit line, and a gate. The fourth transistor includes a current electrode connected to the precharge node, another current electrode connected to the second bit line, and a gate. The control module deactivates the fourth transistor in response to a dummy access of the first storage module at the second transistor.

REFERENCES:
patent: 4918664 (1990-04-01), Platt
patent: 5001671 (1991-03-01), Koo et al.
patent: 5003513 (1991-03-01), Porter et al.
patent: 5206833 (1993-04-01), Lee
patent: 5289432 (1994-02-01), Dhong et al.
patent: 5440717 (1995-08-01), Bosshart
patent: 5666321 (1997-09-01), Schaefer
patent: 5781480 (1998-07-01), Nogle et al.
patent: 5852608 (1998-12-01), Csoppensky et al.
patent: 6078527 (2000-06-01), Roth et al.
patent: 6201758 (2001-03-01), Morishima et al.
patent: 6430088 (2002-08-01), Plants et al.
patent: 7042793 (2006-05-01), Masuo
patent: 7116605 (2006-10-01), Hong
patent: 7260018 (2007-08-01), Nii
patent: 7692974 (2010-04-01), Amirante et al.
patent: 7742350 (2010-06-01), Yamaguchi et al.
patent: 2008/0316851 (2008-12-01), Kinoshita et al.
Motorola Inc., Motorola Semiconductor Technical Data, “Advance Information 64K×18 Bit Synchronous Dual I/O, Dual Address SRAM,” #MCM69D618/D, 1997, pp. 1-16.
Motorola Inc., Motorola Fast SRAM Data, “Fast Static RAM Component and Module Data,” #MCM62110,1997, 32 pages.
Motorola Inc., Motorola Semiconductor Technical Data, “Advance Information 64K×18 Bit Synchronous Separate I/O Fast SRAM,” #MCM69Q618/D, 1997, 12 pages.
Quality Semiconductor, Inc., “QS70261A, QS7026A Preliminary, High-Speed CMOA 16K×16 Asynchronous Dual-Port RAM,” MDSF-00012-6, Jun. 6, 1996, pp. 1-22.
Integrated Device Technology, Inc., “High-Speed 32K×6 Synchronous Pipelined Dual-Port Static RAM,” Preliminary IDT709279A/L, Section 6.26, 1998, pp. 1-16.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Dual port memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual port memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual port memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2669347

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.