Dual-port memory

Details Dual-port memory Dual-port memory

2007-07-30

2009-06-23

Dinh, Son (Department: 2824)

Static information storage and retrieval

Addressing

Multiple port access

C365S063000, C365S230020, C365S189020

Reexamination Certificate

active

07551512

ABSTRACT:
A dual-port memory circuit includes a plurality of memory sub-blocks. Each of the memory sub-blocks includes a plurality of single-port memory cells, at least one row line, and at least one local bit line, the row line and the bit line being coupled to the memory cells for selectively accessing the memory cells. The memory circuit further includes at least one global bit line connected to the plurality of memory sub-blocks. The global bit line is time-multiplexed during a given memory cycle such that the global bit line propagates data associated with a first port in the memory circuit during a first portion of the memory cycle, and the global bit line propagates data associated with a second port in the memory circuit during a second portion of the memory cycle.

REFERENCES:
patent: 6661733 (2003-12-01), Pan et al.
patent: 6992947 (2006-01-01), Pan et al.
patent: 2007/0109884 (2007-05-01), Jung

Affiliated with

Also associated with

Rating

Dual-port memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual-port memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual-port memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4099052