Dual port memories and systems and methods using the same

Details Dual port memories and systems and methods using the same Dual port memories and systems and methods using the same

1996-06-19

1998-12-01

Nelms, David

Static information storage and retrieval

Addressing

Multiple port access

36523003, G11C 800

Patent

active

058448560

ABSTRACT:
A memory 20 includes a first array 100 and a second array 102 of memory cells. A first data port 118 allows for the exchange of data with the first array 100 and a second data port 120 allows for the exchange of data with the second array 102. Memory system 20 also includes a circuitry 122 for controlling data exchanges in a selected mode with the first array 100 via the first data port 118 and with the second array 102 via the second data port 120, the exchanges with the first and second arrays 100 and 102 being asynchronous.

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