Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1998-06-29
2000-11-14
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
710 53, 710 57, G06F 1200
Patent
active
061483656
ABSTRACT:
In accordance with the preferred embodiment of the present invention, a first-in-first out queue includes a buffer for storing data. A write pointer indicates a next position for data to be written into the buffer from an external interface. An input pointer indicates a next position for data to be read out to processing circuitry. An output pointer indicates a next position for data which has been processed by the processing circuitry to be returned to the buffer. A read pointer indicates a next position for data to be read out of the buffer to the external interface.
REFERENCES:
patent: 5978868 (1999-11-01), Maas
patent: 6003099 (1999-12-01), Hintukainen
Cabeca John W.
Tran Denise
VLSI Technology Inc.
Weller Douglas L.
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