Dual mode DDR SDRAM/SGRAM

Details Dual mode DDR SDRAM/SGRAM Dual mode DDR SDRAM/SGRAM

1999-02-26

2003-09-16

Tung, Kee M. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S545000, C345S534000, C711S105000, C365S233100, C713S401000

Reexamination Certificate

active

06621496

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to dual-data rate (DDR) memories, and more particularly to dual-mode DDR synchronous dynamic random access memories (SDRAM's)/synchronous dynamic graphic random access memories (SGRAM's).
BACKGROUND OF THE INVENTION
Graphics-intensive applications for computers such as personal computers (PC's) are becoming increasingly more popular. Such applications include high-end computer-aided drafting (CAD) applications, games, real-time video applications, as well as other applications. As these applications become more complex, they require the computers on which they are run to render and execute graphics much more quickly. Furthermore, as the typical resolution of computer screens have increased from 640×480 pixels (horizontal×vertical) to 800×600, 1024×768 and beyond, and increased color information per pixel from two bits to 24 bits to 32 bits and beyond, the processing demand placed on the computers for fast graphics execution has also grown.
The typical computer relies on a graphics card (also known as a video card, graphic accelerator card, or a display adapter, among other terms) to assist it in the display of graphics on a display device. A graphics card generally includes a specialized processor or processors that are tailor-made for graphics rendering, as well as an amount of memory, ranging from one, two, four, eight, sixteen megabytes and up, so that a complete screen of graphics information, known as a frame, can be stored by the graphics card. Thus, this memory is generally known as a frame buffer of the graphics card. Graphics “cards” may also be integrated within a single chip on a motherboard of a computer. A graphics card, and potentially other components, make up the graphics subsystem of a computer.
Initially, the memory of a graphics card was standard-issue dynamic random-access memory (DRAM), of a sort also used by computer processors to hold more general information. Thus, as improvements in memory to increase their speed became available, such as the introduction of synchronous dynamic random-access memory (SDRAM), they usually have been utilized within graphics cards, too. Ultimately, however, the specialized needs of graphics rendering required their own type of memory, such as synchronous graphics random-access memory (SGRAM), which is analogous to SDRAM, but includes enhanced graphics features for use with graphics cards. The need for faster memory within graphics cards has not, however, abated.
Thus, graphics cards manufacturers have looked to new technologies, such as Rambus DRAM's (also known as Direct RDRAM's), available from Rambus, Inc. of Mountain View, Calif., to increase graphics subsystem performance. Rambus DRAM use within graphics cards, however, has been limited because it is based on a closed standard governed by Rambus, Inc., such that use of Rambus DRAM requires the payment of royalties to Rambus, Inc. Therefore, manufacturers have looked to other technologies that are based on open standards.
One such type of memory is the Double Data Rate (DDR) DRAM. The DDR DRAM achieves increased performance by providing for two data accesses within a single clock cycle—hence its name—by enabling the memory to read data on both the rising and failing edges of each clock cycle. The concept of DDR memories has been extended to SDRAM's and SGRAM's in particular, resulting in DDR SDRAM and DDR SGRAM. Such memory has witnessed increased interest on the part of graphics card designers as a manner by which increased graphics performance can be realized.
However, perhaps because DDR SDRAM and DDR SGRAM are based on an open standard, at least two different types of DDR SDRAM and SGRAM have been proposed. A first standard for DDR SDRAM/SGRAM has been championed by Intel Corp., of Santa Clara, Calif., as implemented by manufacturers such as Samsung Electronics Co., of Suwon, South Korea, in its KM432D5131 DDR SGRAM, a data sheet for which, Revision 0.6 (April 1998), is hereby incorporated by reference. A second standard has been agreed to by the members of the Joint Electronic Device Engineering Council (JEDEC), which is an industry organization that attempts to set common standards, among other things. An example of a DDR SDRAM/SGRAM according to this latter standard is the IBM DDR SGRAM IBM0616328RL6A, manufactured by International Business Machines (IBM), Inc., of White Plains, N.Y., and a data sheet for which, #06L6370-02 (12/97), is also hereby incorporated by reference.
Although both of these standards achieve increased performance over non-DDR SDRAM/SGRAM's, there are functional and timing parameter differences between the two that prevent the use of one in direct lieu of another. For example, CAS latencies, preambles, postambles, enablement/disablement of DLL, as well as set-up and hold-time parameters differ between chips of the differing types. This makes it difficult for memory manufacturers to succeed in the graphics memory marketplace, since they realistically have to produce chips according to both standards if they wish to sell DDR SDRAM/SGRAM's to all potential customers.
An alternative is to design a DDR SDRAM/SGRAM that in actuality has both types of devices on a single chip, such that either device is selectable by the appropriate modification of metal, fuses or bond options on the die. This is disadvantageous, however. Although such a memory may be marketed as being compatible with either standard, in actuality the manufacturer is putting two separate devices on a single chip, which means the manufacturer is ultimately making a chip that is more complex and thus probably more expensive than DDR SDRAM/SGRAM's that are compatible with only one standard or another. Thus, such a “dual-device” DDR SDRAM/SGRAM is realistically a cost-prohibitive solution.
There is a need, therefore, for a DDR SDRAM/SGRAM that operates in accordance with both of any two standards for such memories. Such a solution desirably does not require the use of two separate DDR SDRAM/SGRAM devices on a single chip, either of which is selectable, but rather achieves dual-standard compatibility in a different manner. That is, there is a need for a DDR SDRAM/SGRAM that is compatible with more than one standard and which can be produced in a cost-effective way.
SUMMARY OF THE INVENTION
The above-mentioned shortcomings, disadvantages and problems are addressed by the present invention, which will be understood by reading and studying the following specification. The invention relates to a dual-mode dual-data rate (DDR) synchronous dynamic random access memory (SDRAM)/synchronous graphic random access memory (SGRAM). In one embodiment, a DDR SDRAM/SGRAM comprises a single memory device, which itself comprises a memory array and a logic circuitry. The logic circuitry is coupled to the memory array and is configurable to operate the single memory device in a first mode and a second mode. In a more particular embodiment of the invention, the first mode includes a delayed lock loop (DLL) capability and the second mode includes a non-DLL capability.
Thus, the invention provides for advantages not found in the prior art. A DDR SDRAM/SGRAM according to the invention is able to operate in two modes—for instance, a DLL mode and a non-DLL mode. This means that manufacturers are able to market and sell such memory to original equipment manufacturers (OEM's) regardless of whether they use the memory in the former or the latter mode. Because the memory is a single memory device memory, the manufacturer realizes cost savings as compared to a two memory device memory, and manufacturing efficiencies as well (e.g., not having to produce two separate memories, one for each mode).


REFERENCES:
patent: 5754838 (1998-05-01), Shibata et al.
patent: 5966724 (1999-10-01), Ryan
patent: 6044032 (2000-03-01), Li
patent: 6044429 (2000-03-01), Ryan et al.
patent: 6151271 (2000-11-01), Lee
patent: 6397312 (2002-05-01), Nakano et al.
IEEE Journal of Solid-State Circuits, vol.

Affiliated with

Also associated with

Rating

Dual mode DDR SDRAM/SGRAM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual mode DDR SDRAM/SGRAM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual mode DDR SDRAM/SGRAM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3047087