Dual mode adder circuitry with overflow detection and substituti

Details Dual mode adder circuitry with overflow detection and substituti Dual mode adder circuitry with overflow detection and substituti

1987-11-16

1991-09-10

LaRoche, Eugene R.

Boots, shoes, and leggings

364745, G06F 750

Patent

active

050479750

ABSTRACT:
A video signal processor includes circuitry which may be conditioned by a mode control signal to operate as a single 16-bit adder or as two eight-bit adders. The circuitry includes two eight-bit adders, each of which has a carry-in input terminal and a carry-out output terminal. The carry-out output terminal of one of the adders is selectively coupled, via an AND gate, to the carry-in input terminal of the other adder. The AND gate is controlled by the mode control signal. In the mode where the circuitry operates as two eight-bit adders, additional circuitry is included to detect output values which may exceed the zero to 255 range of valid values and to saturate these invalid values either at zero or 255.

REFERENCES:
patent: 3789206 (1974-01-01), Heightley
patent: 3987291 (1976-10-01), Grooding et al.
patent: 4021655 (1977-05-01), Healy et al.
patent: 4125861 (1978-11-01), Mounts et al.
patent: 4393468 (1983-07-01), New
patent: 4396906 (1983-08-01), Weaver
patent: 4523292 (1985-06-01), Armer
patent: 4573137 (1986-02-01), Ohhashi
patent: 4689823 (1987-08-01), Wojcik et al.
patent: 4701877 (1987-10-01), Sahoda et al.
patent: 4722066 (1988-01-01), Armen et al.
patent: 4768160 (1988-08-01), Yokoyama
patent: 4819198 (1989-04-01), Noll et al.
IBM Technical Disclosure Bulletin, vol. 15, No. 4, pp. 1149-1150, "Variable-Width Adder for Microprogrammed Computers Used for Emulation", J. L. Rosenfeld, Sep. 1972.
M. Kocher & R. Leonardi, "Adaptive Region Growing Technique Using Polynomial Functions for Image Approximation", Signal Processing (Netherlands), vol. 11, No. 1, Jul. 1986, pp. 47-60.
S. Brofferio & F. Rocca, "Interframe Redundancy Reduction of Video Signals Generated by Translating Objects", IEEE Transactions on Communications, Apr. 1977, pp. 448-455.
N. Abramson, Information Theory and Coding, McGraw Hill, 1963, pp. 77-85.
Memory Products Databook, NEC Electronics Inc., Jan. 1985, pp. 345-354.

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