Dual mode accessing signal control apparatus and dual mode...

Details Dual mode accessing signal control apparatus and dual mode... Dual mode accessing signal control apparatus and dual mode...

2009-03-13

2010-11-23

Mai, Son L (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S191000, C365S210100

Reexamination Certificate

active

07839706

ABSTRACT:
A dual mode accessing signal control apparatus for being used in a dummy cells set of a memory, and a dual mode timing signal generating apparatus comprising a dual mode accessing signal control apparatus are provided. The dual mode accessing signal control apparatus respectively generates a write delay signal and a read signal during the write and the read process. The memory is thereby capable of self-timing its write and the read process, and is able to generate a wordline signal with a shorter width in the write process to ensure an early start to precharging. As a result, the whole duty period of the memory can be shortened.

REFERENCES:
patent: 6208563 (2001-03-01), Naritake
patent: 7120045 (2006-10-01), Lee et al.
patent: 7656733 (2010-02-01), Shinozaki et al.
Chang, et al., “Improving the Speed and Power of Compilable SRAM using Dual-Mode Self-Timed Technique”, Dec. 2007 (4 pages).

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