Dual loop level shifter

Electronic digital logic circuitry – Interface – Logic level shifting

Reexamination Certificate

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C326S081000, C326S086000

Reexamination Certificate

active

08085065

ABSTRACT:
A method and apparatus are disclosed to control one or more input output (I/O) pads. An input signal is translated to an output signal having a desired logic level using a first latch loop. The state of the first latch loop is maintained by a second latch loop, integrated with the first latch loop, when a latching indication is received. The integration between the first latch loop and the second latch loop is such that the second latch loop creates an input-output connection if transmission gates in the second latch loop are conductive, and disables the input-output connection if the transmission gates are not conductive.

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patent: 2008/0008011 (2008-01-01), Moon et al.

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