Patent
1991-03-21
1992-07-14
Larkins, William D.
357 75, 357 68, H01L 2328, H01L 2316, H01L 2348
Patent
active
051307804
ABSTRACT:
A dual in-line packaging comprises a substrate having a top surface, a bottom surface and a peripheral surface, semiconductor chips mounted on the top and bottom surfaces of the substrate, a plurality of terminals fixed to the substrate and projecting from the bottom surface of the substrate, a first layer made of a first material and covering the bottom surface of the substrate and the semiconductor chips, and a second layer made of a second material and covering the top surface of the substrate and the semiconductor chips. The first material is resilient and moisture resistant and the second material is hard compared to the first material.
REFERENCES:
patent: 3911475 (1975-10-01), Szedon et al.
patent: 4001655 (1977-01-01), Voyles et al.
patent: 4717948 (1988-01-01), Sakai et al.
patent: 4758875 (1988-07-01), Fujisaki et al.
patent: 4803543 (1989-02-01), Inayoshi et al.
Kokubun Takaki
Kumai Toshio
Nojiri Shingo
Fujitsu Limited
Jr. Carl Whitehead
Larkins William D.
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