Dual-gate non-volatile ferroelectric memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S003000, C257SE27104, C257SE21663, C257SE21664

Reexamination Certificate

active

07982252

ABSTRACT:
A dual-gate non-volatile memory cell includes a first dielectric layer extending over a first gate, a semiconductor region extending over the first dielectric layer, a second dielectric layer comprising tunnel oxide extending over the semiconductor region, a ferroelectric layer extending over the second dielectric layer, and a second gate extending over the ferroelectric layer.

REFERENCES:
patent: 4584672 (1986-04-01), Schutz et al.
patent: 5723885 (1998-03-01), Ooishi
patent: 6532165 (2003-03-01), Katori
patent: 6787832 (2004-09-01), Schmid et al.
patent: 2003/0103391 (2003-06-01), Kang
patent: 2004/0027850 (2004-02-01), Kang
patent: 2005/0036358 (2005-02-01), Kang
patent: 2005/0127454 (2005-06-01), Liou et al.
patent: 2005/0128783 (2005-06-01), Kang
patent: 2005/0231998 (2005-10-01), Kang
patent: 2005/0237784 (2005-10-01), Kang
patent: 2006/0012587 (2006-01-01), Stevenson et al.
patent: 2006/0138504 (2006-06-01), Kang et al.
patent: 2007/0029618 (2007-02-01), Walker
Avci, et al., “Theoretical and Experimental Analysis of Back-Gated SOI MOSFETs and Back-Floating NVRAMs,” J. of Semiconductor Technology and Science, 2004, pp. 18-26, vol. 4, No. 1.
Chang, et al., “A Planar Gate Double Beryllium Implanted GaAs Power MESFET for Low Voltage Digital Wireless Communication Application,” IEEE Transactions on Electron Devices, Jun. 2000, pp. 1134-1138, vol. 47, No. 6, IEEE.
Chang, et al., “Gate Length Scaling and Threshold Voltage Control of Double-Gate MOSFETs,” 2000, pp. 719-722, IEEE.
Ishiwara, “Current Status of FET-Type Ferroelectric Memories,” Proc. 22ndInternational Conference on Microelectronics, May 14-17, 2000, pp. 423-427, vol. 2, IEEE.
Ishiwara, “Current Status of FET-Type Ferroelectric Memories,” 2001, pp. 331-336, IEEE.
Oh, et al., “Analytic Description of Short-Channel Effects in Fully-Depleted Double-Gate and Cylindrical, Surrounding-Gate MOSFETs,” IEEE Electron Device Letters, Sep. 2000, pp. 445-447, vol. 21, No. 9, IEEE.
Tang, et al., “Comparison of Short-Channel Effect and Offstate Leakage in Symmetric vs. Asymmetric Double Gate MOSFETs,” 2000 IEEE International SOI Conference, Oct. 2000, pp. 120-121, IEEE.

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