Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-03-16
2004-02-24
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S383000, C438S592000
Reexamination Certificate
active
06696725
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a semiconductor device comprising transistors, and to a method of manufacturing the semiconductor device. The present invention has particular applicability in manufacturing a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device exhibiting high-speed performance and high reliability.
BACKGROUND ART
Increased integration density requires semiconductor devices having increasingly miniaturized features. As gate lengths are reduced, problems such as short channel effects are encountered. For example, “punch through” arises when the drain voltage reaches a sufficiently large value, and the depletion layer associated with the drain spreads across the substrate and reaches the source, thereby enabling the charge carriers in the drain to punch through to the source and increasing leakage current significantly. Large amount of “punch through” charge carriers may deteriorate a transistor's function completely even with sufficient gate voltage to turn off the channel, resulting in complete loss of its controllability as a switch. In addition, “hot carrier injection” arises when device dimensions are reduced but the supply voltage is maintained, thereby increasing the electric field generated in the silicon substrate. Such an increased electric field enables electrons in the channel region to gain sufficient energy to be injected onto the gate oxide, resulting in device degradation.
There exists a need for semiconductor methodology and devices exhibiting improved short channel characteristics with reduced punch through and hot carrier injection.
DISCLOSURE OF THE INVENTION
An advantage of the present invention is a semiconductor device exhibiting improved short channel characteristics, such as reduced punch through and hot carrier injection.
Another advantage of the present invention is a simplified method of manufacturing a semiconductor device exhibiting improved short channel characteristics.
Additional advantages and other features of the present invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present invention. The objectives and advantages of the present invention may be realized and obtained as particularly pointed out in the appended claims.
According, to the present invention, the foregoing and other advantages are achieved in part by a semiconductor comprising: a substrate; source/drain regions in the substrate with a channel region therebetween; a gate dielectric layer on the substrate overlying the channel region; and a gate electrode on the gate dielectric layer, the gate electrode comprising: a central conductive portion having side surfaces; dielectric sidewall spacers on the side surfaces of the central portion; and edge conductive portions on the sidewall spacers.
Another aspect of the present invention is a method of manufacturing a semiconductor device, the method comprising: forming a gate oxide layer on a main surface of a substrate; forming source/drain regions in the substrate with a channel region between the source/drain regions and under the gate oxide layer; forming an oxide layer on the substrate, the oxide layer having an opening therein, the opening having side surfaces and a lower portion over the channel region, and a gate oxide layer across the lower portion of the opening; and forming a gate electrode on the gate oxide layer by: forming edge conductive portions laterally on the side surfaces of the opening; forming dielectric sidewall spacers laterally on exposed side surfaces of the edge conductive portions; and forming a central conductive portion between the dielectric sidewall spacers.
Additional advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the present invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the present invention. As will be realized, the present invention is capable of other and different embodiments and its several details are capable of modifications in various obvious respects, all without departing from the present invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not restrictive.
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An Judy X.
Yu Bin
Advanced Micro Devices , Inc.
Rose Kiesha
Zarabian Amir
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