Dual gate FinFet

Details Dual gate FinFet Dual gate FinFet

2006-08-15

2006-08-15

Soward, Ida M. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S318000, C257S319000, C257S320000, C257S324000, C257S326000, C257S328000, C257S347000, C257S365000, C257S618000, C257S619000, C257S623000, C257SE29264, C257SE29319

Reexamination Certificate

active

07091566

ABSTRACT:
A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETS. Each FET includes a device gate along one side of a semiconductor (e.g., silicon) fin and a back bias gate along an opposite of the fin. Back bias gate dielectric differs from the device gate dielectric either in its material and/or thickness. Device thresholds can be adjusted by adjusting back bias gate voltage.

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Zhang et al., Low-Power High-Performance Double-Gate Fully Depleted SOI Circuit Design, IEEE Transactions on Eledtron Devices, May 2, 2003, Publisher: IEEE, Published in: US.

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