Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1994-09-28
1996-02-20
Zarabian, A.
Static information storage and retrieval
Read/write circuit
Differential sensing
365205, G11C 702
Patent
active
054935334
ABSTRACT:
A sense amplifier arrangement having two trans-impedance amplifiers and one precision current inverting amplifier, which receive respective first and second sense currents from core memory and a reference current from a matched reference cell. The current inverting amplifier receives the reference current and produces first and second output currents which are summed with the respective first and second sense currents for input to first and second trans-impedance amplifiers which are capable to sink or source current at their inputs as current summing nodes and are effective for producing first and second single ended voltages which are input into respective first and second comparators to produce cmos level output voltages representative of the memory states of the respective first and second memory cells. The corresponding current inverting and trans-impedance amplifiers and comparators are matched by being biased by the same source and because they have respective output voltages with swings around a selected trip point.
REFERENCES:
patent: 3676703 (1972-07-01), Gersbach
patent: 4799195 (1989-01-01), Iwahashi et al.
patent: 4916665 (1990-04-01), Atsumi et al.
patent: 5305273 (1994-04-01), Jinbo
Atmel Corporation
Zarabian A.
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