Dual-differential-pair emitter-coupled logic complementary-outpu

Details Dual-differential-pair emitter-coupled logic complementary-outpu Dual-differential-pair emitter-coupled logic complementary-outpu

1996-07-11

1998-07-14

Nelms, David C.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar transistor

326 18, H03K 19086, H03K 19013

Patent

active

057810354

ABSTRACT:
A complementary-output vertically-stacked ECL gate circuit is disclosed which is low in power dissipation and fast in operation. The ECL gate circuit has a dual differential pair circuit arrangement provided with a pair of complementary outputs and an active pull-down circuit at each of the outputs. This arrangement allows complementary currents to flow through current switching circuits for the respective differential pair circuits and thus provides complementary outputs with built-in active pull-down circuits.

REFERENCES:
patent: 4347446 (1982-08-01), Price
patent: 5381057 (1995-01-01), Kuroda et al.
patent: 5514984 (1996-05-01), Nakamura
"Capacitor-Free Level-Sensitive Active Pull-Down ECL Circuit with Self-Adjusting Driving Capability," Tadahiro Kuroda, et al. IEEE Journal Of Solid-State Circuits, vol. 31, No. 6. Jun. 1996; pp. 819-827.

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