Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-04-05
2005-04-05
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S221000, C438S248000, C438S427000, C438S444000, C438S695000
Reexamination Certificate
active
06875697
ABSTRACT:
A dual depth trench isolation structure formed between active devices and conductive well regions of same conductivity type which comprises a first inter-well isolation structure having a first isolation trench depth, a second inter-well isolation structure having a second isolation trench depth which combine to form a dual depth trench containing the dual depth trench isolation structure comprising the first inter-well isolation structure and the second inter-well isolation structure, with the dual depth trench isolation interposed at the boundary of an n-well conductive region and a p-well conductive region, a first intra-well isolation structure having a first isolation trench depth, the first intra-well isolation structure interposed between a pair of p-channel transistors residing in the n-well region, and a second intra-well isolation structure having a second isolation trench depth, the second intra-well isolation structure interposed between a pair of n-channel transistors residing in the p-well region.
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“A Trench Isolation Technology for High-Speed and Low Power Dissapation Bipolar LSI'S”, H. Sakai et al., Semiconductor Research Center, Matsushita Electric Industrial Co., LTD., Moriguchi, Osaka 570, pp. 17-18.
Micro)n Technology, Inc.
Nelms David
Pham Ly Duy
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