Dual deadman timer circuit

Details Dual deadman timer circuit Dual deadman timer circuit

1980-10-01

1983-11-08

Nusbaum, Mark E.

Boots, shoes, and leggings

364900, G06F 104

Patent

active

044146230

ABSTRACT:
A dual deadman timer circuit functions to reset a dual mode microprocessor in the event of loss of program control. The microprocessor has high and low power requirements corresponding to its two operating modes, and the deadman timer circuit also adjusts the output power level of an associated two-level power supply to ensure that sufficient power is available for the full operation of the microprocessor during reset. The deadman timer functions during both microprocessor modes and includes two level-sensitive input sections to ensure that the microprocessor is reset under an error condition.

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Digital Design; vol. 8, No. 4, Apr. 1978, p. 72, "Improved UC Watchdog Timer Detects Errors".

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