Dual damascene with via liner

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S618000, C438S675000, C438S597000, C438S637000, C257SE21579

Reexamination Certificate

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07387961

ABSTRACT:
A dual damascene structure with improved profiles and reduced defects and method of forming the same, the method including forming a first dielectric over a conductive area; forming a first dielectric insulator over the first dielectric; forming a first opening in the first dielectric insulator; lining the opening with a second dielectric; forming a second dielectric insulator over the first dielectric insulator; forming a second opening in the second dielectric insulator overlying and communicating with the first opening; and, filling the first and second openings with a conductive material to electrically communicate with the conductive area.

REFERENCES:
patent: 6140220 (2000-10-01), Lin
patent: 6878615 (2005-04-01), Tsai et al.

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