Fishing – trapping – and vermin destroying
Patent
1995-06-07
1998-01-06
Gorgos, Kathryn L.
Fishing, trapping, and vermin destroying
437228, 437235, 437238, 437927, H01L 2144
Patent
active
057054304
ABSTRACT:
A dual damascene method of fabricating an interconnection level of conductive lines and connecting vias separated by insulation for integrated circuits and substrate carriers for semiconductor devices using a sacrificial via fill. A first layer of insulating material is formed with via openings. The openings are filled with a sacrificial removable material. A second layer of insulating material is deposed on the first layer. In one embodiment, the etch selectivity to the etchant of the second layer is essentially the same as the sacrificial via fill and, preferably, is substantially higher than second layer. Using a conductive line pattern aligned with the via openings, conductive line openings are etched in the second insulating layer and, during etching, the sacrificial fill is removed from the via openings. In a second embodiment, the sacrificial material is not etchable by the etchant for forming the conductive line openings and, after formation of the conductive line openings, the sacrificial material is removed with an etchant to which the first insulating layer is resistive or less selective. A conductive material now is deposited in the conductive line and via openings.
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Avanzino Steven
Gupta Subhash
Klein Rich
Lin Ming-Ren
Luning Scott D.
Advanced Micro Devices , Inc.
Carroll Chrisman D.
Gorgos Kathryn L.
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