Dual damascene structure and fabrication thereof

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S639000, C257SE21579

Reexamination Certificate

active

11162154

ABSTRACT:
A dual damascene structure is described, including a substrate, a dielectric layer, a hard mask layer, a contact and a conductive line. The dielectric layer is located on the substrate, the hard mask layer is on the dielectric layer, the contact is located in the dielectric layer, and a horizontal cross-section of the contact has an asymmetrically rounded outline. The conductive line is in the hard mask layer and the dielectric layer, and is located on and electrically connected to the contact. The conductive line has a laterally swelling portion on an edge portion of the first contact, wherein the borders of the laterally swelling portion and the edge portion are contiguous.

REFERENCES:
patent: 2003/0199169 (2003-10-01), Jun et al.
patent: 2004/0166666 (2004-08-01), Usami
patent: 2004/0219796 (2004-11-01), Wu

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