Dual damascene process using sacrificial spin-on materials

Semiconductor device manufacturing: process – Chemical etching

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Details

438695, 438700, 438704, 438710, 438745, H01L 2144

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active

060572396

ABSTRACT:
A dual damascene process includes the steps of forming a contact hole in an oxide layer disposed above a semiconductor substrate, disposing a layer of anti-reflective coating material on top of the oxide layer and in the contact hole, and partially etching the layer of anti-reflective coating material and the oxide layer to form the wiring trough. The partial etching step includes the steps of spin coating photoresist on top of the anti-reflective coating material, exposing the photoresist through a mask containing a pattern of the wiring trough, developing the photoresist to expose portions of the anti-reflective coating material, dry etching the exposed portions of the anti-reflective coating material to expose portions of the oxide layer, and wet etching the exposed portions of the oxide layer to form the wiring trough.

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Licata et al., "Dual Damascene Al Wiring For 256M Dram" VMIC Conference pp. 596-602 (1995).

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