Dual damascene process

Details Dual damascene process Dual damascene process

2007-08-07

2007-08-07

Hassanzadeh, Parviz (Department: 1763)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S702000, C438S703000

Reexamination Certificate

active

10915633

ABSTRACT:
A method of fabricating semiconductor devices using dual damascene processes to form plugs in the via holes composed of various high etch materials and bottom anti-reflection coating (BARC) materials. After via hole etch, a layer of high etch rate plug material is spin coated to fill the via holes. Next, a layer of photoresist is applied. The photoresist is then exposed through a mask and developed to form an etch opening. Using the remaining photoresist as an etch mask and with a bottom anti-reflection coating (BARC) as protection, the oxide or low k layer is etched to form subsequent wiring. The etch step is known as a damascene etch step. The remaining photoresist is removed and the trench/via openings are filled with metal forming inlaid metal interconnect wiring and contact vias.

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Brewer Science, Inc. Receiving National Tibbetts Award from U.S. Small Business Administration, Jan. 2001.

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