Dual damascene patterned conductor layer formation method withou

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

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438711, 438723, H01L 2130

Patent

active

060048832

ABSTRACT:
A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed upon the substrate a patterned first dielectric layer which defines a via accessing a contact region formed within the substrate. The patterned first dielectric layer is formed of a first dielectric material which is not susceptible to etching with an oxygen containing plasma. There is then formed upon the patterned first dielectric layer a blanket second dielectric layer which completely covers the patterned first dielectric layer and fills the via. The blanket second dielectric layer is formed of a second dielectric material which is susceptible to etching within the oxygen containing plasma. There is then formed upon the blanket second dielectric layer a blanket hard mask layer which is formed from a hard mask material which is not susceptible to etching within the oxygen containing plasma. There is then formed upon the blanket hard mask layer a patterned photoresist layer which leaves exposed a portion of the blanket hard mask layer greater that an areal dimension of the via and at least partially overlapping the areal dimension of the via. There is then etched while employing a first plasma etch method the blanket hard mask layer to form a patterned hard mask layer defining a first trench formed through the patterned hard mask layer while employing the patterned photoresist layer as a first etch mask layer. The first plasma etch method employs a first etchant gas composition appropriate to the hard mask material from which is formed the blanket hard mask layer. Finally, there is then etched while employing a second plasma etch method the blanket second dielectric layer to form a patterned second dielectric layer having an aperture formed therethrough. The aperture comprises: (1) a second trench corresponding with the first trench; and (2) at least a portion of the first via. The second plasma etch method employs the oxygen containing plasma.

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Korczynski, "Low-K Dielectric Integration Costmodelling" Solid State Technology, Oct. 1997, p. 123-28.

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