Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-05-02
2006-05-02
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S618000, C438S702000, C438S725000
Reexamination Certificate
active
07037841
ABSTRACT:
A method for fabricating a semiconductor device having a dual damascene opening structure. The method includes the steps of providing a substrate having a dielectric layer thereon. A first photoresist layer having a via contact hole pattern is formed on the dielectric layer. A sacrificial layer is formed on the first photoresist layer and fills up the via contact hole pattern. A second photoresist layer having an interconnect trench pattern is formed on the sacrificial layer, thereby exposing the sacrificial layer beneath the interconnect trench pattern. The interconnect trench pattern is transferred to the sacrificial layer using the second photoresist layer as a mask. The first photoresist layer and the dielectric layer are sequentially etched using the second photoresist layer as a mask, thereby transferring the interconnect trench pattern to the dielectric layer, forming an interconnect trench, and further continuously etching the dielectric layer along the via contact hole pattern to form a via contact hole in the dielectric layer.
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Lee Keng-Yao
Liang En-Shan
Wu Meng-Wei
Wu Su-Hua
Birch & Stewart Kolasch & Birch, LLP
Chen Kin-Chan
Winbond Electronics Corp.
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