Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-06-06
2006-06-06
Pham, Hoai (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S774000
Reexamination Certificate
active
07057287
ABSTRACT:
A dual damascene interconnect structure having a patterned multilayer of spun-on dielectrics on a substrate is provided. The structure includes: a patterned multilayer of spun-on dielectrics on a substrate, including: a cap layer; a first non-porous via level low-k dielectric layer having thereon metal via conductors with a bottom portion and sidewalls; an etch stop layer; a first porous low-k line level dielectric layer having thereon metal line conductors with a bottom portion and sidewalls; a polish stop layer over the first porous low-k dielectric; a second thin non-porous low-k dielectric layer for coating and planarizing the line and via sidewalls; and a liner material between the metal via and line conductors and the dielectric layers. Also provided is a method of forming the dual damascene interconnect structure.
REFERENCES:
patent: 6383920 (2002-05-01), Wang et al.
patent: 6723635 (2004-04-01), Ngo et al.
patent: 6797605 (2004-09-01), Goh et al.
patent: 2002/0117737 (2002-08-01), Gates et al.
Kumar Kaushik A
Malone Kelly
Tyberg Christy S
Morris, Esq. Daniel P.
Nguyen Dilinh
Ohlandt Greeley Ruggiero & Perle L.L.P.
Pham Hoai
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