Dual damascene etch processes

Details Dual damascene etch processes Dual damascene etch processes

2007-08-07

2007-08-07

Chen, Kin-Chan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S723000, C438S724000, C438S725000

Reexamination Certificate

active

10360236

ABSTRACT:
A dual damascene trench etching process includes a two-step BARC etching process, a first BARC etch step using a fluorocarbon-based plasma, and a second BARC etch step using an O2/N2-based plasma. The first BARC etch step removes a first portion of the BARC covering a dielectric stack using a fluorocarbon-based plasma. The second BARC etch step removes a second portion of the BARC covering the dielectric stack using a O2/N2based plasma. The dual damascene trench etching process may further include a BARC etch back process to remove a further portion of the BARC not covering the dielectric stack. The dual damascene trench etching process further includes a low-k dielectric etching process that etches trenches in a low-k dielectric layer in the dielectric stack and that avoids the use of argon in order to prevent facet formation.

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