Dual-damascene dielectric structures

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S758000, C257S774000

Reexamination Certificate

active

06909190

ABSTRACT:
A dielectric structure and method for making a dielectric structure for dual-damascene applications over a substrate are provided. The method includes forming a barrier layer over the substrate, forming an inorganic dielectric layer over the barrier layer, and forming a low dielectric constant layer over the inorganic dielectric layer. In this preferred example, the method also includes forming a trench in the low dielectric constant layer using a first etch chemistry, and forming a via in the inorganic dielectric layer using a second etch chemistry, such that the via is within the trench. In another specific example, the inorganic dielectric layer can be an un-doped TEOS oxide or a fluorine doped oxide, and the low dielectric constant layer can be a carbon doped oxide (C-oxide) or other low K dielectrics.

REFERENCES:
patent: 5635423 (1997-06-01), Huang et al.
patent: 5705430 (1998-01-01), Avanzino et al.
patent: 5821168 (1998-10-01), Jain
patent: 5858869 (1999-01-01), Chen et al.
patent: 5904565 (1999-05-01), Nguyen et al.
patent: 5960320 (1999-09-01), Park
patent: 5969422 (1999-10-01), Ting et al.
patent: 5989623 (1999-11-01), Chen et al.
patent: 6025273 (2000-02-01), Chen et al.
patent: 6043167 (2000-03-01), Lee et al.
patent: 6054379 (2000-04-01), Yau et al.
patent: 6069058 (2000-05-01), Hong
patent: 6077574 (2000-06-01), Usami
patent: 6165898 (2000-12-01), Jang et al.
patent: 6187663 (2001-02-01), Yu et al.
patent: 6197696 (2001-03-01), Aoi
patent: 6207577 (2001-03-01), Wang et al.
patent: 6211063 (2001-04-01), Liu et al.
patent: 6225207 (2001-05-01), Parikh
patent: 6255233 (2001-07-01), Smith et al.
patent: 6255735 (2001-07-01), Wang et al.
patent: 6277733 (2001-08-01), Smith
patent: 6287955 (2001-09-01), Wang et al.
patent: 6297163 (2001-10-01), Zhu et al.
patent: 6410394 (2002-06-01), Shao et al.
patent: 6720655 (2004-04-01), Ahn et al.
patent: 2002/0054962 (2002-05-01), Huang
patent: 19904311 (1999-08-01), None
patent: 0834916 (1998-04-01), None
patent: 0945900 (1999-03-01), None
patent: 00/10202 (2000-02-01), None
S. Wolf and R.N. Tauber, “Silicon Processing for the VLSI Era vol. 1—Process Technology,” 1986, Lattice Press, vol. 1, p. 194.
Wolf, Silicon Processing for the VLSI Era, vol. 2—Processi Integration, 1990, pp. 194, Lattice Press: Sunset Beach, CA.

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