Dual damascence copper process using a selected mask

Details Dual damascence copper process using a selected mask Dual damascence copper process using a selected mask

2011-08-02

2011-08-02

Lee, Hsien-ming (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S638000, C438S643000, C438S645000, C438S700000, C257SE21579

Reexamination Certificate

active

07989341

ABSTRACT:
A method for creating a dual damascene structure while using only one lithography and masking step. Conventional dual damascene structures utilize two lithography steps: one to mask and expose the via, and a second step to mask and expose the trench interconnection. The novel method for creating a dual damascene structure allows for a smaller number of processing steps, thus reducing the processing time needed to complete the dual damascene structure. In addition, a lower number of masks may be needed. The exemplary mask or reticle used within the process incorporates different regions possessing different transmission rates. During the exposing step, light from an exposing source passes through the mask to expose a portion of the photoresist layer on top of the wafer. Depending on the transmission rate of the different regions, different thickness of the photoresist layer are exposed and later removed by a developing solution, which allows a subsequent etch process to remove portions of both the dielectric layer and photoresist layer to create a dual damascene structure.

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Office Action for Chinese Patent Application No. 2006100233011; dated Mar. 28, 2008; 9 pages total (English translation not included).

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