Dual current data bus clamp circuit of semiconductor memory devi

Details Dual current data bus clamp circuit of semiconductor memory devi Dual current data bus clamp circuit of semiconductor memory devi

1991-05-28

1992-02-25

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Accelerating charge or discharge

36518906, 365207, 365208, 365233, G11C 700

Patent

active

050918869

ABSTRACT:
A data bus clamping circuit for use in a semiconductor memory device includes a memory cell array for storing data, a row address decoder for decoding row address signals taken in by a row address strobe signal to select memory cells in a row direction of the memory cell array, a column address decoder for decoding column address signals based on a column address decoder enabling signal to select memory cells in a column direction of the memory cell array, complementary data buses for transmitting data read out from the memory cell array, a data bus pull-up circuit for pulling up the complementary data buses, and a differential amplification type of readout circuit for amplifying on a differential basis data on the complementary data buses to output readout data. The data bus clamping circuit includes a first discharge circuit for discharging electric charge on the complementary data buses during an active period of the row address strobe signal, and a second discharge circuit for discharging electric charge on the complementary data buses with a discharge ability larger than the first discharge circuit, during a period of time from the time the active period of the row address strobe signal starts until the column address decoder enabling signal becomes active.

REFERENCES:
patent: 4809230 (1989-02-01), Konishi et al.
patent: 4961168 (1990-10-01), Tran

Affiliated with

Also associated with

Rating

Dual current data bus clamp circuit of semiconductor memory devi does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual current data bus clamp circuit of semiconductor memory devi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual current data bus clamp circuit of semiconductor memory devi will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1897789